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Style rules and idioms for writing high-quality Zener HDL code. Use when writing, reviewing, or refactoring `.zen` files — modules, reference designs, or board files. Covers DNP patterns, typed configs, voltage checks, component naming, computation style, and common gotchas.
npx skill4agent add diodeinc/pcb idiomatic-zener.zenifdnp=# BAD
if add_decoupling:
Capacitor(name="C_VDD", value="100nF", package="0402", P1=VCC, P2=GND)
# GOOD
Capacitor(name="C_VDD", value="100nF", package="0402", P1=VCC, P2=GND)dnp=TruePassive = record(value=typing.Any, dnp=bool)
input_filter = config("input_filter", Frequency, default="0Hz", optional=True,
help="Input lowpass cutoff. 0Hz disables the filter.")
def input_rc(f):
dnp = f <= Frequency("0Hz")
r = e96(Resistance("100ohm") if not dnp else Resistance("0ohm"))
c = e24(1 / (2 * PI * r * f) if not dnp else Capacitance("100pF"))
return Passive(value=r, dnp=False), Passive(value=c, dnp=dnp)
input_r, input_c = input_rc(input_filter)
Resistor(name="R_IN", value=input_r.value, dnp=input_r.dnp, package="0402", P1=A, P2=B)
Capacitor(name="C_IN", value=input_c.value, dnp=input_c.dnp, package="0402", P1=B, P2=GND)# BAD: two resistors, one always DNP
Resistor(name="R_STRAP_HI", value="10kohm", P1=STRAP, P2=VCC, dnp=mode != "HIGH")
Resistor(name="R_STRAP_LO", value="100kohm", P1=STRAP, P2=VCC, dnp=mode != "LOW")
# GOOD: one resistor, value changes with config
_strap_value = { Mode("HIGH"): "10kohm", Mode("LOW"): "100kohm", Mode("FLOAT"): "10kohm" }[mode]
Resistor(name="R_STRAP", value=_strap_value, P1=STRAP, P2=VCC, dnp=mode == Mode("FLOAT"))@stdlib/units.zenenum()# BAD
config("filter_r", str, default="10ohms")
# GOOD
input_filter = config("input_filter", Frequency, default="0Hz", optional=True,
help="Input lowpass cutoff. 0Hz disables the filter.")e96()e24()def load_r(v_out, v_sense):
"""Datasheet §8.1.1 / Eq 4: V_OUT = V_SENSE × gm × R_L"""
GM = Current("200uA") / Voltage("1V")
return e96(v_out / (v_sense * GM))Powervoltage_withinVCC = io("VCC", Power, checks=voltage_within("2.7V to 36V"))help=VDD = io("VDD", Power, checks=voltage_within("3.0V to 5.5V"))
GND = io("GND", Ground)
EN = io("EN", Net, help="High to enable the regulator")
input_filter = config("input_filter", Frequency, default="0Hz", optional=True,
help="Input lowpass cutoff. 0Hz disables the filter.").NET.NET# BAD
Capacitor(name="C_VDD", value="100nF", P1=VCC.NET, P2=GND.NET)
# GOOD
Capacitor(name="C_VDD", value="100nF", P1=VCC, P2=GND)| Element | Convention | Example |
|---|---|---|
| Internal nets | | |
| Component names | Uppercase functional prefix | |
| Differential pairs | | |
ifdnp=.NETstre96()e24()voltage_withinPowerhelp=_P_N_PLUS_MINUS_# pcb:sch