jetson-customize-pinmux
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Translation
ChineseCustomize pinmux (per-pin SFIO / direction / state)
自定义pinmux(单引脚SFIO / 方向 / 状态)
Overview
概述
The Tegra pinmux spreadsheet () is the ground truth for every
CVM ball: SoC pin name, supported SFIOs, customer-selected function,
direction, and initial state. This skill parses that XLSM, runs a
per-pin Q1–Q6 interactive loop, and emits the three BCT DTSIs
(, , ) in one shot into the overlay tracker
at .
.xlsmpinmuxgpiopadvoltage<source.root_path>/Linux_for_Tegra/bootloader/Unlike sibling skills / /
, pinmux has no kernel-DT overlay surface and no
ODMDATA edit. The XLSM is the source of truth; the three emitted
DTSIs land at flash time via the carrier conf's
/ / references (which
set up).
jetson-customize-uphyjetson-customize-pciejetson-customize-cameraPINMUX_CONFIG=GPIOINT_CONFIG=PMC_CONFIG=/jetson-derive-carrierPad classification (silicon-fixed): only and pads have
configurable pull / drive / open-drain attributes. ,
, , , , are
fixed-function and skip Q4–Q6 ().
BD*BI*LP5XA_*UPHYDS_*DP_SINGLE_*BDMIPI16X_*BDUSB2_*OSCI27_*configurable: noThe bundled is the workhorse: it parses
the XLSM via , builds the per-carrier pinmap JSON,
captures pin edits into a session shim, and (on ) writes
the three DTSIs.
scripts/modify_pinmux.pyopenpyxl>=3.1generateTegra pinmux电子表格()是所有CVM引脚的权威来源:包含SoC引脚名称、支持的SFIO、用户选择的功能、方向和初始状态。本Skill会解析该XLSM文件,运行单引脚Q1–Q6交互式流程,并一次性生成三个BCT DTSI文件(、、),输出到路径下的overlay追踪器中。
.xlsmpinmuxgpiopadvoltage<source.root_path>/Linux_for_Tegra/bootloader/与同系列Skill / / 不同,pinmux无需内核-DT overlay层,也无需编辑ODMDATA。XLSM文件是唯一可信来源;生成的三个DTSI文件会在烧录阶段通过载板配置文件的 / / 引用生效(该引用由配置)。
jetson-customize-uphyjetson-customize-pciejetson-customize-cameraPINMUX_CONFIG=GPIOINT_CONFIG=PMC_CONFIG=/jetson-derive-carrier引脚分类(硅片固定): 仅和类型引脚可配置上拉/驱动/开漏属性。、、、、、为固定功能引脚,会跳过Q4–Q6步骤()。
BD*BI*LP5XA_*UPHYDS_*DP_SINGLE_*BDMIPI16X_*BDUSB2_*OSCI27_*configurable: no内置的是核心工具:它通过解析XLSM文件,构建载板专属引脚映射JSON,将引脚编辑内容捕获到会话垫片中,并在执行命令时写入三个DTSI文件。
scripts/modify_pinmux.pyopenpyxl>=3.1generateWhen to invoke
调用场景
- The user says "configure pin", "set SFIO", "edit pinmux DTSI", "set pin direction", "set initial state", or asks to repurpose a CVM ball (e.g. flip a pin between GPIO and a peripheral function).
- A sibling skill (,
jetson-customize-camera,jetson-customize-pcie,jetson-customize-usb) reports an HSIO pin mismatch viajetson-customize-mgbeand the user wants to fix it.pin_verifier.py - The user pre-derived a custom carrier with and now wants to author the pinmux from a freshly-edited
/jetson-derive-carrier..xlsm
Prerequisites:
- Active profile selected (→
target-platform/active_target.ymlwith<profile>.yamlANDreference_devkit:).custom_carrier: - exists as a git repo (
<source.root_path>/Linux_for_Tegra/)./jetson-init-source - has run — the three pinmux-side BCT DTSIs (
/jetson-derive-carrier,PINMUX_CONFIG,GPIOINT_CONFIGreferences in the carrier conf) exist in the overlay tracker.PMC_CONFIG - A pinmux is registered in the active profile at
.xlsm(preferred when custom-carrier- specific) ordocuments.custom_carrier_pinmux_xls(fallback). The bundleddocuments.ref_devkit_pinmux_xlsrequiresmodify_pinmux.py.openpyxl>=3.1
- 用户提及“配置引脚”、“设置SFIO”、“编辑pinmux DTSI”、“设置引脚方向”、“设置初始状态”,或要求重新分配CVM引脚用途(例如在GPIO和外设功能之间切换引脚)。
- 同系列Skill(、
jetson-customize-camera、jetson-customize-pcie、jetson-customize-usb)通过jetson-customize-mgbe报告HSIO引脚不匹配,用户需要修复该问题。pin_verifier.py - 用户已通过预生成自定义载板,现在希望基于刚编辑的
/jetson-derive-carrier文件编写pinmux配置。.xlsm
前置条件:
- 已选择激活配置文件(→ 包含
target-platform/active_target.yml和reference_devkit:的custom_carrier:)。<profile>.yaml - 路径已作为git仓库存在(由
<source.root_path>/Linux_for_Tegra/创建)。/jetson-init-source - 已运行—— 载板配置文件中引用的三个pinmux侧BCT DTSI文件(
/jetson-derive-carrier、PINMUX_CONFIG、GPIOINT_CONFIG)已存在于overlay追踪器中。PMC_CONFIG - 激活配置文件中已注册pinmux 文件,优先使用
.xlsm(自定义载板专属), fallback使用documents.custom_carrier_pinmux_xls。内置的documents.ref_devkit_pinmux_xls需要依赖modify_pinmux.py。openpyxl>=3.1
Procedure
操作流程
See for the full
step-by-step procedure (Steps 1–8). Summary:
references/procedure.md- Resolve active target + XLSM. Validate active profile,
, overlay-tracker prerequisites; resolve the pinmux
custom_carrier:path from.xlsm→documents.custom_carrier_pinmux_xls→ single XLSM underdocuments.ref_devkit_pinmux_xls→ user prompt.documents.root_path - Probe. Run to parse the XLSM into the per-skill scratch
modify_pinmux.py probeplus<KB>/pinmap/<custom-carrier>.jsonshim.session.json - Lookup. Resolve a free-form user query (CVM ball, Verilog
name, signal, DT pin) via ; surface supported SFIO list, defaults, and
modify_pinmux.py lookup.configurable: yes/no - Set-pin (HARD GATE — Q1–Q6 via ). Q1–Q3 (
AskUserQuestion/sfio/direction) always asked; Q4–Q6 (initial_state/pull/drive_type) only whenopen_drain.configurable: yesandtristateare derived frome_input, never asked.direction - Generate. (root, not
modify_pinmux.py generate --out-dir <source.root_path>/Linux_for_Tegra/bootloader/— derive-carrierbootloader/generic/BCT/forks live there, do not colocate). Emits:.dts.tegra<soc>-mb1-bct-{pinmux,gpio,padvoltage}-<carrier-key>.dtsicomes from the carrier conf's<carrier-key>reference, NOT the kebab-cased carrier name.PINMUX_CONFIG= - Commit (single batched commit per workflow rule). All three DTSIs are one logical edit → one customization commit. Run the commit-preview gate before each commit.
- Run-state sidecar + session shim. Write the user-facing
sidecar and the transient
<profile-stem>.jetson-customize-pinmux.jsonshim undersession.json.<workspace>/target-platform/ - Summary. Emit the standard one-line + table summary.
完整的分步流程(步骤1–8)请参考。流程摘要:
references/procedure.md- 解析激活目标 + XLSM文件。验证激活配置文件、、overlay追踪器前置条件;按优先级
custom_carrier:→documents.custom_carrier_pinmux_xls→documents.ref_devkit_pinmux_xls下的单个XLSM文件 → 用户提示,解析pinmuxdocuments.root_path文件路径。.xlsm - 探测。运行命令,将XLSM文件解析为Skill专属临时文件
modify_pinmux.py probe和<KB>/pinmap/<custom-carrier>.json会话垫片。session.json - 查询。通过命令解析用户自由格式查询(CVM引脚、Verilog名称、信号、DT引脚);展示支持的SFIO列表、默认值以及
modify_pinmux.py lookup状态。configurable: yes/no - 设置引脚(严格校验 —— 通过执行Q1–Q6)。Q1–Q3(
AskUserQuestion/sfio/direction)始终会询问;Q4–Q6(initial_state/pull/drive_type)仅在open_drain时询问。configurable: yes和tristate由e_input推导得出,不会单独询问。direction - 生成。执行(注意:路径为根目录,不要放在
modify_pinmux.py generate --out-dir <source.root_path>/Linux_for_Tegra/bootloader/下 —— derive-carrier生成的bootloader/generic/BCT/文件存放在该目录,请勿混放)。生成文件:.dts。tegra<soc>-mb1-bct-{pinmux,gpio,padvoltage}-<carrier-key>.dtsi来自载板配置文件的<carrier-key>引用,而非短横线分隔的载板名称。PINMUX_CONFIG= - 提交(每个工作流规则对应一次批量提交)。三个DTSI文件属于同一逻辑编辑 → 对应一次定制提交。每次提交前需运行提交预览校验。
- 运行状态副文件 + 会话垫片。在路径下写入用户可见的
<workspace>/target-platform/副文件和临时<profile-stem>.jetson-customize-pinmux.json会话垫片。session.json - 总结。输出标准的单行摘要 + 表格摘要。
Gotchas
注意事项
- No kernel-DT overlay; no edit; no
OVERLAY_DTB_FILEhand-off. This skill ends at the three BCT DTSIs — the carrier conf already references them viarender_conf.py/PINMUX_CONFIG=/GPIOINT_CONFIG=(set up byPMC_CONFIG=)./jetson-derive-carrier - Re-point the wrapper's
.dtsafter#include.generateforks the/jetson-derive-carrierwrappers at.dts, but theirbootloader/generic/BCT/lines may still pull the upstream devkit#include(e.g..dtsi). After…-p3834-xxxx-p4071-0000.dtsiwrites the newgenerateto<CARRIER_KEY>.dtsiroot, edit each wrapper'sbootloader/to the new filename — by bare basename (#include), not#include "tegra<soc>-mb1-bct-pinmux-<CARRIER_KEY>.dtsi"filesystem-relative. The BCT build's../../…resolves bare basenames; that's the convention every other BCT include in the tree follows. Roll the wrapper edits into the same customization commit as the three DTSIs. Seecpp -I bootloader/Step 5 ("Sanity-check the carrierreferences/procedure.mdwrapper")..dts - Q4–Q6 gated on . Asking pull / drive_type / open_drain on a fixed-function pad (
configurable: yes,LP5XA_*,UPHYDS_*, etc.) is silently dropped by the script and confuses the user.BDMIPI16X_*printslookup— always check it before prompting Q4–Q6.configurable: yes/no - and
tristateare derived, never asked.e_input→ tristate=ENABLE;unused/input→ enable-input=ENABLE. Exposing them as separate prompts produces inconsistent DTSIs.bidirectional - requires a parseable
sfio=gpioentry in the pinmap row'sgpio=GPIOn_PD.NNlist. Pins without one are GPIO-incapable silicon;sfiorejects the call. Surface the rejection — don't silently fall back to a non-GPIO SFIO.set-pin - Marker idempotency. Every per-pin edit carries
on the closing brace; gpio default-state entries carry the same marker as a trailing comment. Re-running
// custom-bsp: pinmuxmust detect and update — never duplicate.generate - is unchanged from the original framework — it reads its own
modify_pinmux.pyshim undersession.json. The shim is regenerated each run from the active profile + the user-facing sidecar. Do not hand-edit the shim; it's transient.--kb-dir - Multiple pinmux DTSI variants per Thor module SKU. Some carrier
pins live in a different DTSI variant than the one the carrier
conf references. (legacy patch-in-place flow) tolerates missing per-pin blocks via
modify_pinmux.py commitrather than failing. Surface the warning; point at the alternate DTSI variant.pinmux.warnings[] - Don't touch the upstream BSP at . All edits land in
<bsp_image.root_path>under the pristine + customization commit pattern.<source.root_path>/Linux_for_Tegra/bootloader/
- 无需内核-DT overlay;无需编辑;无需移交
OVERLAY_DTB_FILE。本Skill的输出仅为三个BCT DTSI文件 —— 载板配置文件已通过render_conf.py/PINMUX_CONFIG=/GPIOINT_CONFIG=引用它们(由PMC_CONFIG=配置)。/jetson-derive-carrier - 生成后需更新包装文件的
.dts路径。#include会在/jetson-derive-carrier目录下生成bootloader/generic/BCT/包装文件,但它们的.dts行可能仍引用上游开发板的#include文件(例如.dtsi)。生成新的…-p3834-xxxx-p4071-0000.dtsi文件到<CARRIER_KEY>.dtsi根目录后,需编辑每个包装文件的bootloader/路径为新文件名 —— 使用纯文件名(#include),而非#include "tegra<soc>-mb1-bct-pinmux-<CARRIER_KEY>.dtsi"这类文件系统相对路径。BCT构建时的../../…会解析纯文件名;这是该目录下所有其他BCT引用遵循的约定。将包装文件的编辑内容与三个DTSI文件的编辑内容合并到同一次定制提交中。详情请参考cpp -I bootloader/步骤5(“校验载板references/procedure.md包装文件”)。.dts - Q4–Q6仅在时触发。对固定功能引脚(
configurable: yes、LP5XA_*、UPHYDS_*等)询问上拉/驱动类型/开漏属性会被脚本静默忽略,导致用户困惑。BDMIPI16X_*命令会打印lookup状态 —— 触发Q4–Q6前务必检查该状态。configurable: yes/no - 和
tristate为推导值,不会单独询问。e_input→ tristate=ENABLE;unused/input→ enable-input=ENABLE。将它们作为单独选项展示会导致DTSI文件不一致。bidirectional - 要求引脚映射行的
sfio=gpio列表中包含可解析的sfio条目。无该条目的引脚为不支持GPIO的硅片;gpio=GPIOn_PD.NN命令会拒绝该请求。需明确展示拒绝信息 —— 请勿静默回退到非GPIO的SFIO。set-pin - 标记幂等性。每个单引脚编辑内容的闭合括号处会添加标记;gpio默认状态条目会在末尾添加相同标记。重新运行
// custom-bsp: pinmux命令时必须检测并更新这些标记 —— 切勿重复添加。generate - 与原始框架保持一致 —— 它会读取
modify_pinmux.py路径下的--kb-dir会话垫片。该垫片每次运行时都会根据激活配置文件和用户可见副文件重新生成。请勿手动编辑该垫片;它是临时文件。session.json - Thor模块SKU可对应多个pinmux DTSI变体。部分载板引脚所在的DTSI变体可能与载板配置文件引用的变体不同。(旧版原地补丁流程)会通过
modify_pinmux.py commit容忍缺失的单引脚块,而非直接失败。需展示该警告;并指向替代DTSI变体。pinmux.warnings[] - 请勿修改路径下的上游BSP。所有编辑内容需按照“纯净版+定制提交”模式,写入
<bsp_image.root_path>路径下。<source.root_path>/Linux_for_Tegra/bootloader/
Available Scripts
可用脚本
| Script | Purpose | Arguments |
|---|---|---|
| XLSM parser + per-pin DTSI generator. Invoked via | |
| Renders pinmux/GPIO/padvoltage DTSI fragments from the bundled session state. Called by | |
Invoke from the skill body as a subprocess via :
run_script()bash
undefined| 脚本 | 用途 | 参数 |
|---|---|---|
| XLSM解析器 + 单引脚DTSI生成器。在步骤3-6中通过 | |
| 基于内置会话状态渲染pinmux/GPIO/padvoltage DTSI片段。由 | |
通过从Skill主体中以子进程方式调用:
run_script()bash
undefinedrun_script: probe the carrier pinmux XLSM and write a session state
run_script: 探测载板pinmux XLSM并写入会话状态
scripts/modify_pinmux.py probe --xlsm carrier.xlsm --session .pinmux-session.json
scripts/modify_pinmux.py probe --xlsm carrier.xlsm --session .pinmux-session.json
run_script: render DTSI fragments from the final session state
run_script: 基于最终会话状态渲染DTSI片段
scripts/modify_pinmux.py generate --session .pinmux-session.json --out-dir bsp_sources/pinmux/
undefinedscripts/modify_pinmux.py generate --session .pinmux-session.json --out-dir bsp_sources/pinmux/
undefinedReferences
参考资料
- — full Step 1–8 procedure prose.
references/procedure.md - — Q1–Q6 prompt schema consumed by Step 4.
questions.json - —
../../references/platform_template.yamlblock (documents:,ref_devkit_pinmux_xls).custom_carrier_pinmux_xls - — overlay edit protocol (single-commit per DTSI fork).
../../context/bsp-customization-workflow.md - — must run first; produces the pinmux / gpio / padvoltage DTSI forks this skill edits, and rewrites the carrier conf's
../jetson-derive-carrier/SKILL.md/PINMUX_CONFIG=/GPIOINT_CONFIG=lines to point at them.PMC_CONFIG= - — produces the overlay tracker this skill commits into.
../jetson-init-source/SKILL.md - — author the profile's
../jetson-link-docs/SKILL.mdblock, including the pinmux XLSM bindings.documents:
- —— 完整的步骤1–8流程说明。
references/procedure.md - —— 步骤4使用的Q1–Q6提示 schema。
questions.json - ——
../../references/platform_template.yaml块(documents:、ref_devkit_pinmux_xls)。custom_carrier_pinmux_xls - —— overlay编辑协议(每个DTSI分支对应一次提交)。
../../context/bsp-customization-workflow.md - —— 必须先运行该Skill;它会生成本Skill需要编辑的pinmux / gpio / padvoltage DTSI分支,并修改载板配置文件的
../jetson-derive-carrier/SKILL.md/PINMUX_CONFIG=/GPIOINT_CONFIG=行以指向这些分支。PMC_CONFIG= - —— 生成本Skill用于提交的overlay追踪器。
../jetson-init-source/SKILL.md - —— 编写配置文件的
../jetson-link-docs/SKILL.md块,包括pinmux XLSM绑定。documents: