┌─────────────────────────────────────────────────────────────┐
│  Application Layer (src/)           User Code + AI-assisted Generation               │
├─────────────────────────────────────────────────────────────┤
│  RT-Thread Layer          Component Configuration + Software Package Management                 │
├─────────────────────────────────────────────────────────────┤
│  Board-level Drivers (board/ports)  FAL/File System/WiFi Adaptation             │
├─────────────────────────────────────────────────────────────┤
│  FSP Generated Layer (ra_gen/)   Generated by FSP Configurator, Prohibited from Editing       │
├─────────────────────────────────────────────────────────────┤
│  Hardware Abstraction (FSP HAL)      Official Drivers, No User Modifications                │
└─────────────────────────────────────────────────────────────┘

┌─────────────────────────────────────────────────────────────────┐
│  User Query                                                       │
│  "How to add DMA?" / "Analyze my project" / "OSPI configuration error"           │
└─────────────────────────────────────────────────────────────────┘
                          ↓
┌─────────────────────────────────────────────────────────────────┐
│  Phase 0: SDK Sample Query (New)                                   │
│  - Search SDK sample projects (README_zh.md)                             │
│  - Find projects with similar functions                                           │
│  - Extract configuration solutions and key steps                                       │
└─────────────────────────────────────────────────────────────────┘
                          ↓
┌─────────────────────────────────────────────────────────────────┐
│  Phase 1: Project Type Identification (Quick File Check)                           │
│  - Check if rtconfig.h exists                                      │
│  - Check if board/ports/ directory exists                                │
│  - Check if packages/ directory exists                                   │
└─────────────────────────────────────────────────────────────────┘
                          ↓
┌─────────────────────────────────────────────────────────────────┐
│  Phase 2: Analyze Current Configuration                                              │
│  analyze_project_config(config_path="...")                    │
│  → Returns: MCU model, configured modules, pin assignments, clock configuration              │
└─────────────────────────────────────────────────────────────────┘
                          ↓
┌─────────────────────────────────────────────────────────────────┐
│  Phase 3: Understand New Requirements                                           │
│  Confirm specific requirements with users (number of channels, baud rate, sampling rate, etc.)                 │
└─────────────────────────────────────────────────────────────────┘
                          ↓
┌─────────────────────────────────────────────────────────────────┐
│  Phase 4: Query FSP Documentation (Call fsp-docs mcp tool)                          │
│  Combine MCP tools based on requirements:                                      │
│  ├─ get_config_workflow(peripheral="...")  → Configuration steps          │
│  ├─ search_docs(query="...")             → Specific usage            │
│  ├─ find_examples(keyword="...")         → Code examples            │
│  ├─ get_api_reference(api_name="...")    → API details           │
│  └─ get_module_info(module="...")        → Module overview           │
└─────────────────────────────────────────────────────────────────┘
                          ↓
┌─────────────────────────────────────────────────────────────────┐
│  Phase 5: Guide Configuration (Based on MCP Returned Information)                       │
│  - FSP Configurator GUI configuration steps                            │
│  - RT-Thread Settings component selection                                 │
│  - Software package addition                                                   │
│  - Board-level driver creation                                                 │
└─────────────────────────────────────────────────────────────────┘
                          ↓
┌─────────────────────────────────────────────────────────────────┐
│  Phase 6: Generate User Code (Based on Documents + Examples)                       │
│  - Integrate documents and examples returned by MCP                                    │
│  - Generate code that matches the project style                                       │
│  - Include error handling and logging                                           │
└─────────────────────────────────────────────────────────────────┘
                          ↓
┌─────────────────────────────────────────────────────────────────┐
│  Phase 7: Debugging and Validation                                             │
│  - If problems occur, use MCP tools again to search for solutions                     │
│  - search_docs(query="troubleshooting ...")                   │
└─────────────────────────────────────────────────────────────────┘

User → Claude → Skill Activation → Call MCP Tools → Return Information → Integrate Response → User

undefined

**Available MCP Tools**:
- `search_sdk_examples(query)` - Search SDK sample projects

**SDK Sample Project Structure**:

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```python

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---

User Request
    │
    ├─ Mentioned project path?
    │   └─ YES → analyze_project_config() 
    │
    ├─ Asked "how to configure" a peripheral?
    │   └─ YES → get_config_workflow() 
    │
    ├─ Asked about specific API usage?
    │   └─ YES → get_api_reference() + find_examples()
    │
    ├─ Encountered an error/problem?
    │   └─ YES → search_docs() + find_examples() 
    │
    ├─ Needs code examples?
    │   └─ YES → find_examples() + get_module_info()
    │
    └─ Wants to understand module functions?
        └─ YES → get_module_info()

User: "I want to add ADC functionality"

Step 1 - Analyze Current Status:
Skill → analyze_project_config("...")
MCP → Returns configured modules and pins
Skill → Confirm resource availability

Step 2 - Obtain Configuration Guidance:
Skill → get_config_workflow("ADC")
MCP → Returns FSP Configurator steps

Step 3 - Obtain Specific Information:
Skill → search_docs("ADC GPT timer trigger")
MCP → Returns relevant document paragraphs

Step 4 - Obtain Code Examples:
Skill → find_examples("ADC interrupt callback")
MCP → Returns sample code

Step 5 - Integrate and Respond:
Skill → Synthesize all information and provide complete guidance

User: "OSPI Flash initialization fails"

Step 1 - Analyze Configuration:
Skill → analyze_project_config("...")
MCP → Returns OSPI configuration details

Step 2 - Search for Solutions:
Skill → search_docs("OSPI ID 0xFFFFFFFF troubleshooting")
MCP → Returns troubleshooting steps

Step 3 - If the above is insufficient:
Skill → get_module_info("OSPI")
MCP → Returns detailed module configuration options

Step 4 - Provide Test Code:
Skill → find_examples("OSPI read JEDEC ID")
MCP → Returns test code examples

Step 5 - Integrate Debugging Process:
Skill → Provide systematic troubleshooting checklist

✓ General C syntax issues
✓ Code style suggestions
✓ RT-Thread basic APIs (e.g., rt_thread_mdelay)
✓ Debugging technique explanations
✓ Compilation error interpretations

Timing for calling fsp-docs mcp tool:

User Query
    ↓
Skill Judges Requirements
    ↓
Need FSP-specific information?
    ├─ YES → Call MCP Tools ← This is the trigger point for calling fsp-docs mcp tool
    │         ↓
    │    MCP Returns FSP Documentation/Configuration/Examples
    │         ↓
    │    Skill Integrates Information
    │         ↓
    └─ NO → Use General Knowledge
         ↓
Skill Responds to User

undefined

# Dimension 2: Configured FSP Modules
"FSP Modules": list of modules returned by analyze_project_config(),
# Example: ["g_ioport", "g_uart8", "g_adc0", "g_ospi_b", ...]

# Dimension 3: Enabled RT-Thread Components
"RT-Thread Components": Check rtconfig.h macro definitions,
# Example: ["DFS", "LWIP", "SAL", "WIFI", "MQTT"]

# Dimension 4: Added Software Packages
"Software Packages": Check packages/ directory,
# Example: ["wifi-host-driver", "netutils", "fal", "littlefs"]

# Dimension 5: Board-level Driver Support
"Board-level Drivers": Check board/ports/,
# Example: ["drv_filesystem.c", "fal_cfg.h", "drv_rtl8211.c"]

**Project Description Example** (instead of simple classification):

**API Selection Principles** (instead of hard rules):

| Operating System | GPIO API | Timer API | Delay API | Peripheral API |
|---------|---------|-----------|---------|---------|
| **RT-Thread** | `rt_pin_write()` | `rt_timer_t` | `rt_thread_mdelay()` | Select based on peripheral type |
| **Bare-metal** | `R_IOPORT_PinWrite()` | `R_GPT_Start()` | `R_BSP_SoftwareDelay()` | FSP HAL API |

**Special Notes**:
- For peripherals like UART/SPI/I2C, **always use FSP HAL API** (`R_SCI_UART_Write()`)
- For GPIO in RT-Thread, **recommend using** `rt_pin_write()` (more concise), but FSP API is also acceptable
- Timers: Use `rt_thread_mdelay()` for simple delays, use `R_GPT_xxx()` for PWM/hardware timers

**API Selection Rules**:

| Function | Type A (Bare-metal) | Type B/C/D (RT-Thread) |
|------|--------------|------------------------|
| GPIO | `R_IOPORT_PinWrite()` | `rt_pin_write()` |
| UART | `R_SCI_UART_Write()` | `R_SCI_UART_Write()` (keep) |
| Timer | `R_GPT_Start()` | `rt_timer_t` (RT-Thread Timer) |
| Delay | `R_BSP_SoftwareDelay()` | `rt_thread_mdelay()` |

analyze_project_config(config_path="<project_path>/configuration.xml")

Return Content:
- MCU Information (model, core, FSP version)
- Configured Modules (g_ioport, g_uart8, g_ospi_b, etc.)
- Pin Assignments (function configuration for each pin)
- Clock Configuration (PLL, system clock, peripheral clock)
- Interrupt Configuration (priority, vector number)
- Dependencies (DMA, trigger source, etc.)

=== Project Analysis Report ===
MCU: RA8P1 (R7KA8P1KFLCAC), Cortex-M85 Dual-Core
FSP Version: 6.0.0
Project Type: RT-Thread + OSPI Flash + LittleFS

Configured Modules:
  ✓ g_ioport (I/O Port)
  ✓ g_uart8 (SCI UART, Ch8, 115200 8N1)
  ✓ g_ospi_b (OSPI, Unit0, Ch1, 1S_1S_1S Mode)
  ✓ g_transfer0 (DMAC, Ch0, 2-byte Transfer)

Pin Assignments:
  UART8:   P500→RXD8, P501→TXD8
  OSPI0:   P808→SCLK, P100→DQ0, P104→CS, P105→INT, P106→RESET

Clock Configuration:
  CPUCLK: 500 MHz (PLL1P/1)
  PCLKD:  125 MHz (ICLK/4)
  SCICLK: 50 MHz (PLL2R/4) → UART Source Clock

FAL Partitions:
  - whd_firmware:  512 KB (WiFi Firmware)
  - download:      2 MB (OTA Download)
  - filesystem:   12 MB (LittleFS)

Available Resources:
  - SCI0, SCI1, SCI2 (SPI mode available)
  - GPT0-GPT7 (timers available)
  - ADC0 (sampling channels available)

Ask users to confirm:
1. What peripheral to add? (UART/SPI/I2C/ADC/OSPI/DMA/WiFi)
2. What are the specific requirements? (baud rate, sampling rate, interrupt, etc.)
3. What is the application scenario? (data acquisition, communication, storage, etc.)
4. What are the performance requirements? (real-time, throughput, power consumption)

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#include <rtthread.h>
#include "hal_data.h"

#define DBG_TAG "user_app"
#define DBG_LVL DBG_LOG
#include <rtdbg.h>

/* Pin definitions use BSP macros */
#define LED_PIN  BSP_IO_PORT_00_PIN_12
#define LED_ON   (0)
#define LED_OFF  (1)

void hal_entry(void)
{
    fsp_err_t err;

    LOG_I("System initializing...");

    /* Configure GPIO (RT-Thread API) */
    rt_pin_mode(LED_PIN, PIN_MODE_OUTPUT);
    rt_pin_write(LED_PIN, LED_OFF);

    /* FSP peripherals are opened in g_hal_init(), ready to use directly */

    while (1)
    {
        rt_pin_write(LED_PIN, LED_ON);
        rt_thread_mdelay(500);
        rt_pin_write(LED_PIN, LED_OFF);
        rt_thread_mdelay(500);
    }
}

/* Implement FSP callback function */
void user_uart8_callback(uart_callback_args_t *p_args)
{
    switch (p_args->event)
    {
        case UART_EVENT_RX_CHAR:
            /* Received data: p_args->data */
            break;
        case UART_EVENT_TX_COMPLETE:
            break;
        default:
            break;
    }
}

#include "hal_data.h"

void hal_entry(void)
{
    fsp_err_t err;

    /* Open peripheral */
    err = R_SCI_UART_Open(&g_uart8_ctrl, &g_uart8_cfg);
    assert(FSP_SUCCESS == err);

    /* Use peripheral */
    uint8_t data[] = "Hello FSP!\r\n";
    R_SCI_UART_Write(&g_uart8_ctrl, data, sizeof(data));

    while (1)
    {
        /* Main loop */
    }
}

undefined

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Stacks:
  ├─ g_ioport (I/O Port)
  └─ g_uart8 (SCI UART, Debug Output)

- PIN Device (for GPIO)
- No additional components required

void hal_entry(void)
{
    /* GPIO uses RT-Thread API */
    rt_pin_mode(LED_PIN, PIN_MODE_OUTPUT);

    while (1)
    {
        rt_pin_write(LED_PIN, PIN_HIGH);
        rt_thread_mdelay(500);
    }
}

Stacks:
  ├─ g_ioport
  ├─ g_uart8 (Debug)
  ├─ g_adc0 (ADC)
  └─ g_transfer0 (DMA, optional)

- PIN Device
- No additional components required

/* ADC Initialization */
R_ADC_Open(&g_adc0_ctrl, &g_adc0_cfg);
R_ADC_ScanCfg(&g_adc0_ctrl, &g_adc0_channel_cfg);

/* Read ADC Value */
uint16_t adc_value;
R_ADC_Read(&g_adc0_ctrl, ADC_CHANNEL_0, &adc_value);
float voltage = (adc_value * 3.3) / 4095.0;

Stacks:
  ├─ g_ioport
  ├─ g_uart8
  ├─ g_ospi_b (OSPI Flash, 1S_1S_1S or 8D_8D_8D)
  └─ g_transfer0 (DMAC, OSPI DMA)

Pin Configuration (Titan Board):
  - P808 → OSPI_SCLK
  - P100 → OSPI_DQ0 (MOSI)
  - P803 → OSPI_DQ1 (MISO)
  - P104 → OSPI_CS
  - P105 → OSPI_INT
  - P106 → OSPI_RESET

RT-Thread Settings:
  ├─ DFS (Device File System)
  ├─ FAL (Flash Abstraction Layer)
  └─ LittleFS (File System Type)

board/ports/
  ├─ fal_cfg.h       ← FAL partition table definition
  └─ drv_filesystem.c  ← File system automatic mounting

/* fal_cfg.h */
#define NOR_FLASH_DEV_NAME "ospi_flash"

#define FAL_PART_TABLE {                                                                 \
    {FAL_PART_MAGIC_WORD, "firmware",   NOR_FLASH_DEV_NAME, 0x000000,   512*1024, 0}, \
    {FAL_PART_MAGIC_WORD, "download",   NOR_FLASH_DEV_NAME, 512*1024,  2*1024*1024, 0}, \
    {FAL_PART_MAGIC_WORD, "filesystem",  NOR_FLASH_DEV_NAME, 0x300000, 12*1024*1024, 0}, \
}

static int onboard_fal_mount(void)
{
    fal_init();
    struct rt_device *mtd_dev = fal_mtd_nor_device_create("filesystem");

    /* Mount LittleFS */
    if (dfs_mount("filesystem", "/fal", "lfs", 0, 0) != 0)
    {
        dfs_mkfs("lfs", "filesystem");
        dfs_mount("filesystem", "/fal", "lfs", 0, 0);
    }
    return RT_EOK;
}
INIT_COMPONENT_EXPORT(onboard_fal_mount);

msh />list_device
filesystem   MTD Device    1

msh />ls /fal
test.txt

Inherit Combination 3, add additionally:
  └─ g_sdhi1 (SD Host Interface, WiFi Module Interface)

SDHI Pins:
  - SDIO Data Lines (D0-D3)
  - SDIO Command Line (CMD)
  - SDIO Clock (CLK)

RT-Thread Settings:
  ├─ LWIP 2.0.3 (TCP/IP Protocol Stack)
  ├─ SAL (Socket Abstraction Layer)
  └─ WIFI (WiFi Framework)

packages/
  ├─ wifi-host-driver-latest (WHD 3.1.0, Infineon CYW4343W)
  └─ netutils-latest
      ├─ ping (network connectivity test)
      ├─ ntp (network time synchronization)
      ├─ tftp (file transfer)
      ├─ telnet (remote login)
      ├─ iperf (performance test)
      └─ tcpdump (packet capture tool)

#define FAL_PART_TABLE {                                                                  \
    {FAL_PART_MAGIC_WORD, "whd_firmware", NOR_FLASH_DEV_NAME, 0x000000,   512*1024, 0}, \
    {FAL_PART_MAGIC_WORD, "whd_clm",      NOR_FLASH_DEV_NAME, 512*1024,   512*1024, 0}, \
    {FAL_PART_MAGIC_WORD, "download",     NOR_FLASH_DEV_NAME, 1024*1024, 2*1024*1024, 0}, \
    {FAL_PART_MAGIC_WORD, "filesystem",   NOR_FLASH_DEV_NAME, 0x300000, 12*1024*1024, 0}, \
}

msh />wifi join ssid password
[I/WLAN.mgnt] wifi connect success
[I/WLAN.lwip] Got IP address : 192.168.1.100

msh />ping www.rt-thread.org
60 bytes from 120.222.223.251 icmp_seq=1 ttl=48 time=76 ms

msh />ntp_sync
[I/ntp] Get local time: Mon Feb 10 15:30:00 2025

Stacks:
  ├─ g_ether (Ethernet MAC)
  └─ g_phy (Ethernet PHY, optional)

Pins:
  - RMII/RGMII Data Lines
  - MDIO/MDC (PHY Management)

board/ports/
  └─ drv_rtl8211.c (PHY Driver)

Stacks:
  ├─ g_spi0 (SCI SPI, Sensor Interface)
  ├─ g_ospi_b (Flash Storage)
  └─ g_transfer0 (DMA)

/* Read SPI Sensor */
R_SCI_SPI_Write(&g_spi0_ctrl, cmd, 1);
R_SCI_SPI_Read(&g_spi0_ctrl, data, len);

/* Store to Flash */
R_OSPI_B_Write(&g_ospi_b_ctrl, data, flash_addr, len);

Stacks:
  ├─ g_adc0 (ADC)
  ├─ g_gpt0 (Timer Trigger)
  ├─ g_transfer0 (ADC DMA)
  └─ g_ospi_b (Flash Storage)

ELC Configuration:
  - GPT0 Event → ADC Conversion Trigger
  - ADC Conversion Complete → DMA Trigger

/* Callback Function (called by FSP) */
void user_uart8_callback(uart_callback_args_t *p_args)
{
    if (p_args->event == UART_EVENT_RX_CHAR)
    {
        /* Received character: p_args->data */
    }
}

/* Send Data */
R_SCI_UART_Write(&g_uart8_ctrl, data, len);

/* Read Data (in interrupt mode) */
R_SCI_UART_Read(&g_uart8_ctrl, buffer, size);

R_SCI_SPI_Write(&g_spi0_ctrl, tx_data, length);
R_SCI_SPI_Read(&g_spi0_ctrl, rx_data, length);

Stack: r_ospi_b
  - Unit: 0
  - Channel: 1
  - SPI Protocol: 1S_1S_1S (compatible) or 8D_8D_8D (high-speed)
  - Address Bytes: 3 (or 4, depending on Flash capacity)
  - Sector Erase Size: 4096
  - Block Erase Size: 262144

DMA: r_dmac
  - Channel: 0
  - Size: 2 Bytes
  - Mode: Normal

/* Open OSPI */
R_OSPI_B_Open(&g_ospi_b_ctrl, &g_ospi_b_cfg);

/* Read Flash ID */
uint8_t jedec_id[4];
R_OSPI_B_DirectRead(&g_ospi_b_ctrl, 0x9F, jedec_id, 4);

/* Page Programming */
R_OSPI_B_Write(&g_ospi_b_ctrl, src_addr, flash_addr, length);

/* Sector Erase */
R_OSPI_B_Erase(&g_ospi_b_ctrl, flash_addr, OSPI_B_ERASE_SIZE_4KB);

Stack: r_dmac
  - Channel: 0-7
  - Transfer Size: 1/2/4/8 Bytes
  - Mode: Normal/Repeat/Block
  - Src Addr Mode: Fixed/Incremented
  - Dst Addr Mode: Fixed/Incremented
  - Activation Source: Peripheral Trigger (e.g., UART TXI)

/* DMA Transfer Configuration (UART TX) */
transfer_info_t g_transfer0_info = {
    .p_src = &tx_buffer,
    .p_dest = NULL,  // UART Register
    .length = 100,
    .num_blocks = 0,
    .transfer_settings_word_b.size = TRANSFER_SIZE_1_BYTE,
    .transfer_settings_word_b.dest_addr_mode = TRANSFER_ADDR_MODE_FIXED,
};

/* Start DMA */
R_DMAC_Open(&g_transfer0_ctrl, &g_transfer0_cfg);
R_DMAC_Enable(&g_transfer0_ctrl);

/* 1. Open ADC */
R_ADC_Open(&g_adc0_ctrl, &g_adc0_cfg);

/* 2. Configure Scan Channels */
R_ADC_ScanCfg(&g_adc0_ctrl, &g_adc0_channel_cfg);

/* 3. Start Scan */
R_ADC_ScanStart(&g_adc0_ctrl);

/* 4. Read Results */
uint16_t adc_value;
R_ADC_Read(&g_adc0_ctrl, ADC_CHANNEL_0, &adc_value);

/* 5. Convert to Voltage */
float voltage = (adc_value * 3.3) / 4095.0;

Basic Project (GPIO + UART)
    │
    ├─→ Add ADC → Data Acquisition Project
    │     - FSP: g_adc0
    │     - RT-Thread: No additional components required
    │
    ├─→ Add SPI → SPI Sensor Project
    │     - FSP: g_spi0 (SCI SPI)
    │     - RT-Thread: No additional components required
    │
    ├─→ Add OSPI Flash → Flash Storage Project
    │     - FSP: g_ospi_b + g_transfer0
    │     - RT-Thread: DFS + FAL + LittleFS
    │     - Board-level: fal_cfg.h, drv_filesystem.c
    │
    ├─→ Add WiFi → Wireless Network Project
    │     - Prerequisite: OSPI Flash required to store firmware
    │     - FSP: g_sdhi1
    │     - RT-Thread: LWIP + SAL + WIFI
    │     - Software Packages: wifi-host-driver, netutils
    │
    ├─→ Add Ethernet → Wired Network Project
    │     - FSP: g_ether
    │     - RT-Thread: LWIP + SAL
    │     - Board-level: drv_rtl8211.c
    │
    └─→ Add USB → USB Communication Project
          - FSP: g_usb (CDC/HID/MSC)
          - RT-Thread: USB Device Stack

Phase 1: Data Acquisition (Basic Project + ADC)
  ✓ FSP: g_adc0 + g_gpt0 (timed trigger)
  ✓ RT-Thread: No additional components required
  ✓ Validation: ADC data output via serial port

    ↓ Expand

Phase 2: Local Storage (Phase 1 + OSPI Flash)
  ✓ FSP: g_ospi_b + g_transfer0
  ✓ RT-Thread: DFS + FAL + LittleFS
  ✓ Board-level: fal_cfg.h, drv_filesystem.c
  ✓ Validation: Data saved to /fal/data.log

    ↓ Expand

Phase 3: Network Connection (Phase 2 + WiFi)
  ✓ FSP: g_sdhi1
  ✓ RT-Thread: LWIP + SAL + WIFI
  ✓ Software Packages: wifi-host-driver, netutils
  ✓ Validation: WiFi join successful, ping external network

    ↓ Expand

Phase 4: Cloud Upload (Phase 3 + MQTT/HTTP)
  ✓ RT-Thread: WebClient or Paho MQTT
  ✓ Validation: Data successfully uploaded to cloud platform

□ Current project compiles successfully
□ Existing functions work normally
□ Understand dependency relationships of new functions
□ Confirm sufficient hardware resources (pins/memory/peripherals)
□ Prepare reference sample code

□ New FSP module configuration is correct
□ New RT-Thread components are enabled
□ New software packages are downloaded
□ Compilation without errors or warnings
□ New functions pass tests
□ Existing functions are not affected

#define DBG_TAG "debug"
#define DBG_LVL DBG_LOG
#include <rtdbg.h>

LOG_I("OSPI Flash ID: 0x%X", flash_id);
LOG_E("FAL init failed!");

msh />list_device           # List all devices
msh />list_thread           # List all threads
msh />free                   # Check memory usage
msh />cpu                   # Check CPU usage

fsp_err_t err = R_OSPI_B_Open(&g_ospi_b_ctrl, &g_ospi_b_cfg);
if (FSP_SUCCESS != err)
{
    LOG_E("OSPI open failed: %d", err);
    /* Error recovery or safe handling */
    return;
}

1. analyze_project_config(config_path="...")

   Output Example:
   - MCU: RA8P1, FSP 6.0.0
   - Existing: g_ioport, g_uart8
   - RTOS: RT-Thread 5.1.0
   - Missing: ADC Module

2. Confirm Requirements:
   - How many ADC channels to collect? (User: 1 channel)
   - Sampling frequency? (User: 1kHz)
   - Trigger method? (User: Timer trigger)

3. get_config_workflow(peripheral="ADC")

4. search_docs(query="ADC GPT timer trigger DMA")

5. Provide FSP Configuration Steps:
   - Add g_adc0 stack
   - Add g_gpt0 stack (timed trigger)
   - Add g_transfer1 (ADC DMA, if needed)
   - Configure ELC (GPT → ADC Trigger)
   - Generate code

6. Generate User Code:
   - ADC Initialization
   - GPT Timer Configuration
   - ADC Read Function
   - DMA Buffer Processing

7. Provide Validation Methods:
   - Use oscilloscope to view ADC waveform
   - Output ADC values via serial port

1. analyze_project_config() to confirm current status

2. Explain Dependency Relationships:
   - OSPI Flash is a common choice for large-capacity storage
   - FAL + LittleFS required to implement file system
   - DMAC required to improve transfer efficiency

3. get_config_workflow(peripheral="OSPI")

4. search_docs(query="OSPI Flash LittleFS FAL integration")

5. Provide FSP Configuration:
   Stacks:
     - OSPI_B (g_ospi_b)
       * Unit: 0
       * Channel: Select according to board
       * Protocol: 1S_1S_1S (best compatibility)
     - DMAC (g_transfer0)
       * Channel: 0
       * Size: 2 Bytes

   Pins: Configure according to user hardware manual
     - SCLK, DQ0(MOSI), DQ1(MISO), CS#, INT#, RESET#

6. Provide RT-Thread Configuration:
   RT-Thread Settings:
     - Components → DFS (enable)
     - Components → FAL (enable)
     - Components → DFS_LITTLEFS (enable)

7. Create Board-level Driver Files:
   board/ports/fal_cfg.h:
     ```c
     #define NOR_FLASH_DEV_NAME "ospi_flash"
     #define FAL_PART_TABLE {                                      \
         {FAL_PART_MAGIC_WORD, "download",   NOR_FLASH_DEV_NAME,   \
          0x000000, 1*1024*1024, 0},                              \
         {FAL_PART_MAGIC_WORD, "filesystem", NOR_FLASH_DEV_NAME,   \
          0x100000, 7*1024*1024, 0},                              \
     }
     ```

   board/ports/drv_filesystem.c:
     [Provide complete mounting code template]

8. Provide Test Code:
   ```c
   void test_filesystem(void)
   {
       FILE *fp = fopen("/fal/test.txt", "w");
       fprintf(fp, "Hello OSPI Flash!\n");
       fclose(fp);
   }

---

1. analyze_project_config()

2. Check Prerequisites:
   ❌ No OSPI Flash → Need to add OSPI first
   ❌ OSPI exists but insufficient space → Need to adjust partitions
   ✅ OSPI exists and space sufficient → Can proceed

3. Explain WiFi Module Selection:
   - Common: Infineon CYW4343W (SDIO Interface)
   - Others: Realtek RTL8720, ESP32, etc.
   - Confirm user hardware model

4. get_config_workflow(peripheral="SDHI")

5. search_docs(query="WiFi CYW4343W SDIO configuration")

6. Provide FSP Configuration:
   Stacks:
     - SDHI (g_sdhi1)
       * Channel: 1
       * Card Type: SDIO
       * DMA: Enable

   Pins: Standard SDIO Pins
     - D0-D3, CMD, CLK

7. Provide RT-Thread Configuration:
   RT-Thread Settings:
     - Components → LWIP (enable)
     - Components → SAL (enable)
     - Components → WIFI (enable)

   packages/:
     - Add wifi-host-driver-latest
     - Add netutils-latest (optional)

8. Adjust FAL Partitions (WiFi firmware requires space):
   ```c
   #define FAL_PART_TABLE {                                      \
       {FAL_PART_MAGIC_WORD, "whd_firmware", NOR_FLASH_DEV_NAME, \
        0x000000, 512*1024, 0},                                 \
       {FAL_PART_MAGIC_WORD, "whd_clm", NOR_FLASH_DEV_NAME,      \
        512*1024, 512*1024, 0},                                 \
       {FAL_PART_MAGIC_WORD, "download", NOR_FLASH_DEV_NAME,     \
        1024*1024, 2*1024*1024, 0},                             \
       {FAL_PART_MAGIC_WORD, "filesystem", NOR_FLASH_DEV_NAME,   \
        0x400000, remaining space, 0},                                  \
   }

---

1. analyze_project_config()
   - Check OSPI configuration
   - Check pin mapping
   - Check clock configuration

2. Systematic Troubleshooting:

   Inspection Item 1: Pin Configuration
   □ Are SCLK, DQ0, DQ1, CS# correct?
   □ Is pin multiplexing conflicting?
   □ Is hardware connection secure?

   Inspection Item 2: SPI Protocol
   □ Current protocol: 1S_1S_1S / 4S_4S_4S / 8D_8D_8D?
   □ Does Flash support current protocol?
   □ Try switching to 1S_1S_1S (most compatible)

   Inspection Item 3: Clock Frequency
   □ Current clock: ? MHz
   □ Reduce to minimum frequency for testing
   □ Check maximum frequency in Flash datasheet

   Inspection Item 4: Power and Reset
   □ Is Flash VCC normal?
   □ Is RESET# pin controlled correctly?
   □ Is power-on delay required?

3. search_docs(query="OSPI Flash troubleshooting ID 0xFFFFFFFF")

4. Provide Test Code:
   ```c
   /* Simplest Test */
   uint8_t cmd = 0x9F;  // JEDEC ID
   uint8_t id[4];
   R_OSPI_B_DirectRead(&g_ospi_b_ctrl, &cmd, 1, id, 4);
   LOG_I("Flash ID: 0x%02X 0x%02X 0x%02X", id[0], id[1], id[2]);

---

1. Requirement Analysis:
   - MCU: RA8P1 (user-specified)
   - Sensor: DHT22 (1-Wire)
   - Storage: Last 7 days of data (about 100KB)
   - Network: WiFi + MQTT
   - Upload Cycle: Every 10 minutes
   - Power Consumption: Low-power mode

2. Project Planning (Phased Implementation):

   ┌─────────────────────────────────────┐
   │  Phase 1: Basic Framework (1-2 days)            │
   ├─────────────────────────────────────┤
   │ FSP:                                │
   │   ✓ g_ioport (GPIO Control)            │
   │   ✓ g_uart8 (Debug Output)              │
   │ RT-Thread:                          │
   │   ✓ Basic Configuration                        │
   │ Validation: LED Blinking, Serial Port Output             │
   └─────────────────────────────────────┘
                    ↓
   ┌─────────────────────────────────────┐
   │  Phase 2: Sensor Acquisition (2-3 days)          │
   ├─────────────────────────────────────┤
   │ FSP:                                │
   │   ✓ g_gpio_ext (DHT22 1-Wire)       │
   │ Functions:                                │
   │   ✓ DHT22 Driver                     │
   │   ✓ Timed Acquisition (rt_timer)             │
   │ Validation: Serial Port Output of Temperature and Humidity Data             │
   └─────────────────────────────────────┘
                    ↓
   ┌─────────────────────────────────────┐
   │  Phase 3: Local Storage (3-4 days)            │
   ├─────────────────────────────────────┤
   │ FSP:                                │
   │   ✓ g_ospi_b + g_transfer0         │
   │ RT-Thread:                          │
   │   ✓ FAL + LittleFS                 │
   │ Board-level:                                │
   │   ✓ fal_cfg.h (100KB Partition)         │
   │   ✓ drv_filesystem.c                │
   │ Validation: Data Saved to /fal/data.csv      │
   └─────────────────────────────────────┘
                    ↓
   ┌─────────────────────────────────────┐
   │  Phase 4: WiFi Connection (3-4 days)           │
   ├─────────────────────────────────────┤
   │ FSP:                                │
   │   ✓ g_sdhi1 (WiFi Module)            │
   │ RT-Thread:                          │
   │   ✓ LWIP + SAL + WIFI              │
   │ Software Packages:                              │
   │   ✓ wifi-host-driver               │
   │ Validation: WiFi Connection Successful, Ping Passed        │
   └─────────────────────────────────────┘
                    ↓
   ┌─────────────────────────────────────┐
   │  Phase 5: Cloud Upload (2-3 days)            │
   ├─────────────────────────────────────┤
   │ RT-Thread:                          │
   │   ✓ MQTTClient (Paho)              │
   │ Functions:                                │
   │   ✓ MQTT Connection                       │
   │   ✓ JSON Data Packing                   │
   │   ✓ Periodic Upload (rt_thread Delay)       │
   │ Validation: Cloud Platform Receives Data                │
   └─────────────────────────────────────┘
                    ↓
   ┌─────────────────────────────────────┐
   │  Phase 6: Low-Power Optimization (2-3 days)          │
   ├─────────────────────────────────────┤
   │ FSP:                                │
   │   ✓ Low-Power Configuration                      │
   │ RT-Thread:                          │
   │   ✓ Sleep Mode                        │
   │ Validation: Measure Power Consumption Data                  │
   └─────────────────────────────────────┘

3. Provide for Each Phase:
   - Detailed FSP Configuration Steps
   - RT-Thread Component Configuration
   - Code Examples and Comments
   - Test and Validation Methods

4. Risk Tips:
   - DHT22 1-Wire timing is sensitive
   - MQTT disconnection and reconnection handling
   - WiFi wake-up in low-power mode
   - Flash wear leveling (handled by LittleFS)

5. Provide Debugging and Optimization Suggestions

/*
 * Copyright (c) 2025
 * Description: [Function Description]
 * Author: [Author]
 */

// ✅ Good Naming
adc_channel_0_config
spi_master_read_sensor
wifi_connect_to_ap

// ❌ Avoid Naming
cfg1
func2
temp

fsp_err_t err = R_ADC_Open(&g_adc0_ctrl, &g_adc0_cfg);
if (FSP_SUCCESS != err)
{
    LOG_E("ADC open failed: %d", err);
    /* Error recovery or safe handling */
    return;
}

LOG_I("Initializing OSPI Flash...");
LOG_I("Flash ID: 0x%X", jedec_id);
LOG_I("FAL partitions created successfully");
LOG_I("Filesystem mounted to /fal");

/*
 * Usage:
 * 1. Configure FSP: OSPI_B + DMAC
 * 2. Configure RT-Thread: FAL + LittleFS
 * 3. Call fal_init() to initialize
 * 4. Use dfs_mount() to mount file system
 * 5. Use standard file APIs: fopen(), fread(), fwrite()
 */